1. Field of Invention
The present invention relates in general to the memory repair technology, and more particularly to a repairable pseudo-dual port static random access memory.
2. Related Art
Recently, the flourishing development of the electronic industry and the rapid progress of the associated electronic technology continuously reduce the scale of the manufacturing process of the memory. A static random access memory (SRAM) is the embedded memory device, which is widely used in the very-large-scale integration (VLSI) field. With the progress of the manufacturing process, the area of the memory cell of the current single static random access memory has been smaller than 2 μm2 in the 0.13 μm manufacturing process and has reached about 1 μm2 in the 90 nm manufacturing process. This means that an extremely small particle may cause the bit failure of the static random access memory.
In the application of the panel driving integrated circuit, the resolution of the panel is continuously increased, and the capacity and the area of the static random access memory to be built in are also increased. When the total area of the static random access memory is increased, its single bit memory cell area is reduced. In the same panel driving integrated circuit, the opportunity of the appearance of the bit failure due to the manufacturing process or particles is gradually increased. Thus, the overall panel driving circuit often becomes a failed die only due to the bit failure of the static random access memory, and the influence of the production yield becomes more and more obvious.
In order to overcome the bit failure of the static random access memory and increase the yield, the repair mechanism of the static random access memory becomes very important. In the repair mechanism, it is a difficult issue for the integrated circuit designer to design redundant memory cells and to automatically replace the failed bit. In the prior art, several techniques are used to repair the memory defects, as disclosed in U.S. Pat. Nos. 5,257,229 and 7,173,867 B2.
The '229 is directed to the static random access memory with the single port and the repair is made using the redundant row. In order to utilize the redundant row more efficiently, each redundant row may be mapped to any row position for repair in the '229 patent. However, this technology is designed for the repair of the column address of the single-port static random access memory, but cannot be applied to the repair of the failed bit of the dual-port static random access memory because the data buses of the two ports have different bandwidths. In addition, each redundant row in this technology can be applied to repair any row so that the efficiency seems very high. In the static random access memory, however, many select circuits for the redundant rows and the corresponding fuses are needed. Therefore, it is not practical if this technology is applied to the dual-port static random access memory.
The '867 patent is to partition the memory with the very high density. The memory is partitioned into small blocks, which may work rapidly, by global/local bit lines and global/local word lines. Thereafter, the redundant row or column is placed in each small block to serve as the repair mechanism. The drawback of this technology is similar to the previous technology. Although the memory is divided into many small blocks and each small block has its own redundant row or redundant column for repair, this method needs to store a lot of failed bit addresses. Thus, the decoding scheme of the redundant column using this technology cannot be easily applied to the memory on the driving circuit of the liquid crystal display panel.
Because the driving circuit of the liquid crystal display panel needs the dual-port static random access memories with different bandwidths, the typical memory repair technology is mainly applied to the single-port static random access memory. When the repair technology has to be applied to the non-symmetrical dual-port static random access memory (e.g., the driving circuit of the liquid crystal display), the automatic repair circuit and the layout arrangement represented thereby cannot be efficiently used in non-symmetrical two ports in the prior art.